The present invention relates to electronic circuits including signal current reflecting means such as current mirror circuits, reflection cascode circuits and the like, and more specifically to an electronic circuit including feedforward means for compensating operational speed of the signal current reflecting means. A multiplier is suggested as an example of the electronic circuit including the signal current reflecting means.
As shown in FIG. 1, a conventional multiplier comprises a first differential pair including N-channel metal oxide semiconductor (MOS) field effect transistors (FET) mn1 and mn2 both having gates to receive a first power source voltage V.sub.IN1, a second differential pair including N-channel MOS FET mn3 and mn4 both having gates to receive a second power source voltage V.sub.IN2, and a third differential pair including N-channel MOS FET mn5 and mn6 both having gates to receive the second power source voltage V.sub.IN2, which are connected with one another by a cascade connection and in which first and second current outputs I.sub.OUT1 and I.sub.OUT2 are conducted from drains of the N-channel MOS FET mn3-mn6 constituting the second and third differential pairs, respectively.
In such the configuration, since it is impossible to realize a low power source voltage, a multiplier shown in FIG. 2 is conventionally proposed. The multiplier comprises four current mirror circuits in addition to three differential pairs shown in FIG. 1. A first current mirror circuit CM1 includes P-channel MOS FET mp1 and mp3, a second current mirror circuit CM2 includes P-channel MOS FET mp2 and mp4, a third current mirror circuit CM3 includes N-channel MOS FET mn3 and mn5, and a fourth current mirror circuit includes N-channel MOS FET mn4 and mn6. IN this manner, even though it is possible to realize the low power source voltage because the multiplier comprises the first through the fourth current mirror circuits CM1-CM4, a provision of four current mirror circuits makes the multiplier increase several numbers of nodes, thereby resulting a problem that a parasitic capacitance occurring in these nodes causes a signal bandwidth capable of processing to be narrow.
The current mirror circuits are generally used as means for reflecting a signal current in the conventional analog integrated circuits (IC). These are circuits in which, when base or gate electrodes and emitter or source electrodes in a plurality of transistors are commonly connected with one another in the case where sizes of the transistors are the same as one another, it is possible to cause a current to flow by having a predetermined value similar to an external current which is supplied to the transistors in the manner of being mirrored to the transistors on the output side.
However, in the case where the current mirror circuit is configured by using a P-channel MOS FET and a pnp transistor, since element operation speed of the P-MOS FET and the pnp transistors is limited, an operation frequency is also limited with respect to the electronic circuit including the current mirror circuits.
On the other hand, as disclosed in FIG. 2(b) of "A CMOS WIDEBAND AMPLIFIER WITH 800 MHz GAIN-BANDWIDTH", Proceedings, IEEE 1991 Custom Integrated Circuits Conference, there is suggested a method of providing a feedforward signal path by a capacitance in addition to a reflection cascode circuit except the current mirror circuit.
In this conventional example, a low frequency signal current is passing through a gate grounded circuit configured of a resistance and a P-MOS FET, while a high frequency signal current is passing through a feedforward signal path including a capacitance and a gate grounded circuit configured of an N-MOS FET, thereby improving entire high-frequency characteristics because of avoiding the P-MOS FET having a wrong high-frequency characteristic.
However, the conventional method has a problem that the circuit becomes a large scale and a complicated design because it is necessary to independently provide a circuit for generating a bias voltage to a gate or base in the gate- or base- grounded transistor constituting the reflection cascode circuit.
Accordingly, it is necessary to independently provide a gate grounded circuit and a bias circuit thereof in order to improve an operational speed in a high-frequency region in the conventional method using the reflection cascode circuit.